Nanosieves Save Energy In Biofuel Production

Daily Science Journal (Feb. 13, 2008) — A new type of membrane, developed by scientists of the University of Twente in The Netherlands, can stand high temperatures for a long period of time. This ‘molecular sieve’ is capable of removing water out of e.g. solvents and biofuels. It is a very energy efficient alternative to existing techniques like distillation.

The cylinder is the carrier of a hybrid membrane: a layer of about 100 nanometer thickness. The insert shows a close-up of the layer showing the organic links and pores. From the left of the tube, only water molecules leave the sieve. (Credit: Image courtesy of University of Twente)

Even after testing during 18 months, the new membranes prove to be highly effective, while having continuously been exposed to a temperature of 150 ºC. Existing ceramic and polymer membranes will last considerably shorter periods of time, when exposed to the combination of water and high temperatures. The scientists managed to do this using a new ‘hybrid’ type of material combining the best of both worlds of polymer and ceramic membranes. The result is a membrane with pores sufficiently small to let only the smallest molecules pass through.

Ceramic membranes, made of silica, degrade because they react with water and steam. In the new membrane, part of the ceramic links is therefore replaced by organic links. By doing this, water doesn’t have the chance to ‘attack’ the membranes. Manufacturing the new hybrid membranes is simpler than that of ceramic membranes, because the material is flexible and will not show cracks. What they have in common with ceramic membranes is the rapid flow: an advantage of this is that the membrane surface can be kept small.

The hybrid membranes are suitable for ‘drying’ solvents and biofuels, an application for which there is a large potential market worldwide. The main advantage of membrane technology is that it consumes far less energy than common distillation techniques.

The scientists also foresee opportunities in separating hydrogen gas from gas mixtures. This implies a broad range of applications in sustainable energy. Apart from that, the hybrid membranes are suitable for desalinating water. Using a hybrid membrane that is much smaller than the current polymer membranes, the same result can be achieved.

The results have been achieved in a close cooperation of scientists from the Inorganic Materials Science Group of the MESA+ Institute for Nanotechnology (UT), the Energy Efficiency in Industry department of ECN and the University of Amsterdam. The invention has been patented worldwide.

The article ‘Hybrid ceramic nanosieves: stabilizing nanopores with organic links’ by Hessel Castricum, Ashima Sah, Robert Kreiter, Dave Blank, Jaap Vente and André ten Elshof has been published in Chemical Communications (ChemComm) of the Royal Society of Chemistry in de UK.

Adapted from materials provided by University of Twente.

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New Polymer Could Improve Semiconductor Manufacturing, Packaging

Daily Science Journal (Feb. 2, 2008) — Researchers at Rensselaer Polytechnic Institute and Polyset Company have developed a new inexpensive, quick-drying polymer that could lead to dramatic cost savings and efficiency gains in semiconductor manufacturing and computer chip packaging.

Researchers from Rensselaer Polytechnic Institute's Department of Physics and Center for Integrated Electronics have developed a new inexpensive, quick-drying polymer that could lead to dramatic cost savings and efficiency gains in semiconductor manufacturing and computer chip packaging. In this series of scanning electron microscope images of the new PES polymer in a UV-imprint lithography application, the well-defined pattern indicates the material’s potential for use in next-generation chip making techniques. (Credit: Rensselaer Polytechnic Institute)

Along with allowing enhanced performance and cost savings for conventional photolithography processes, the new material, called polyset epoxy siloxane (PES), should also enable a new generation of lower-cost, on-chip nanoimprinting lithography technology, according to the researchers.

"With this new material, chip manufacturers will be able to trim several steps from their production and packaging processes, and in turn realize a cost savings," said Toh-Ming Lu, the R.P. Baker Distinguished Professor of Physics at Rensselaer, who oversaw the study. "PES is cheaper and more reliable."

The widely adopted technique of photolithography involves using a mix of light and chemicals to generate intricate micro- and nano-scale patterns on tiny areas of silicon. As part of the process, a thin polymer film -- called a redistribution layer, and crucial to the effectiveness of device -- is deposited onto the silicon wafer, in order to ease the signal propagation delay and to protect the chip from different environmental and mechanical factors.

The new PES material developed by Lu's group and Polyset Company is one such thin polymer film, and it offers several advantages over the incumbent materials typically used in the semiconductor manufacturing industry. In addition, their new PES material can also be used as a thin polymer film for ultraviolet (UV) on-chip nanoimprinting lithography technology, which is still in the early phases of development. The consistency of using PES in conventional technology, and then continuing to use PES while academia and industry test and gradually migrate to the next generation of devices, should help ease the transition, Lu said.

"Having the ability to use one material -- our new PES -- for both photolithography and imprint will be very attractive to manufacturers," Lu said. "At its core, our project is basic research, but it also has important industry implications. It's very exciting."

Manufacturers today typically use benzocyclobutene and polyimide as polymers for redistribution layers, because of their low water absorption, thermal stability, low curing temperature, low thermal expansion, low dielectric constant, and low leakage current. Lu said PES offers significant advantages to these materials, particularly in the areas of cure temperature and water uptake.

PES cures, or dries and hardens, at 165 degrees Celsius, about 35 percent cooler than the other two materials. The need for less heat should translate directly into lower overhead costs for manufacturers, Lu said. Another advantage of PES is its low water uptake rate of less than 0.2 percent, less than the other materials. Additionally, PES adheres well to copper and can easily be made less brittle if needed. All of these attributes make PES a promising candidate for redistribution layer application and UV imprint lithography.

"The results demonstrate that PES is feasible to be used as UV-curable resist for both the redistribution application for electronic packaging and micro/nano imprint lithography," said Rensselaer Research Associate Pei-I Wang, co-author of the new paper, published recently in the Journal of Vacuum Science and Technology B.

Along with photolithography and on-chip nanoimprinting lithography, PES holds the potential for applications in other optical devices, flat-panel display, biotechnology devices, and microelectromechanical systems, Wang said.

In addition to Lu and Wang, co-authors on the paper include Rensselaer materials science and engineering professor Omkaram Nalamasu, who is also chief technical officer of Applied Materials Inc. in Santa Clara, Calif.; Rajat Ghoshal and Ram Ghoshal of Polyset Co. Inc. in Mechanicville, N.Y.; Charles Schaper of Transfer Devices Inc. in Santa Clara, Calif.; and Andrew Li of Applied Materials.

The project was funded through the New York State Foundation for Science, Technology and Innovation.

Adapted from materials provided by Rensselaer Polytechnic Institute.

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New Kind Of Transistor Radios Shows Capability Of Nanotube Technology

Daily Science Journal (Jan. 30, 2008) — Carbon nanotubes have a sound future in the electronics industry, say researchers who built the world's first all-nanotube transistor radios to prove it.

Schematic exploded view of a radio-frequency transistor that uses parallel, aligned arrays of carbon nanotubes for the semiconductor. (Credit: Images courtesy John Rogers)

The nanotube radios, in which nanotube devices provide all of the active functionality in the devices, represent "important first steps toward the practical implementation of carbon-nanotube materials into high-speed analog electronics and other related applications," said John Rogers, a Founder Professor of Materials Science and Engineering at the University of Illinois.

Rogers is a corresponding author of a paper* that describes the design, fabrication and performance of the nanotube-transistor radios, which were achieved in a close collaboration with radio frequency electronics engineers at Northrop Grumman Electronics Systems in Linthicum, Md.

"These results indicate that nanotubes might have an important role to play in high-speed analog electronics, where benchmarking studies against silicon indicate significant advantages in comparably scaled devices, together with capabilities that might complement compound semiconductors," said Rogers, who also is a researcher at the Beckman Institute and at the university's Frederick Seitz Materials Research Laboratory.

Practical nanotube devices and circuits are now possible, thanks to a novel growth technique developed by Rogers and colleagues at the U. of I., Lehigh and Purdue universities, and described last year in the journal Nature Nanotechnology.

The growth technique produces linear, horizontally aligned arrays of hundreds of thousands of carbon nanotubes that function collectively as a thin-film semiconductor material in which charge moves independently through each of the nanotubes. The arrays can be integrated into electronic devices and circuits by conventional chip-processing techniques.

"The ability to grow these densely packed horizontal arrays of nanotubes to produce high current outputs, and the ability to manufacture the arrays reliably and in large quantities, allows us to build circuits and transistors with high performance and ask the next question," Rogers said. "That question is: 'What type of electronics is the most sensible place to explore applications of nanotubes"' Our results suggest that analog RF (radio frequency) represents one such area."

As a demonstration of the growth technique and today's nanotube analog potential, Rogers and collaborators at the U. of I. and Northrop Grumman fabricated nanotube transistor radios, in which nanotube devices provided all of the key functions.

The radios were based on a heterodyne receiver design consisting of four capacitively coupled stages: an active resonant antenna, two radio-frequency amplifiers, and an audio amplifier, all based on nanotube devices. Headphones plugged directly into the output of a nanotube transistor. In all, seven nanotube transistors were incorporated into the design of each radio.

In one test, the researchers tuned one of the nanotube-transistor radios to WBAL-AM (1090) in Baltimore, to pick up a traffic report.

"We were not trying to make the world's tiniest radios," Rogers said. "The nanotube radios are a demonstration, an important milestone toward building the technology into a form that ultimately would be commercially competitive with entrenched approaches."

*The paper has been accepted for publication in the Proceedings of the National Academy of Sciences, and is to be published in PNAS Online Early Edition in the first week in February, 2008.

The work was funded by the National Science Foundation and the U.S. Department of Energy.

Adapted from materials provided by University of Illinois at Urbana-Champaign.

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Integrated Receiver For High Frequency Applications On A Tiny Chip

Daily Science Journal (Dec. 31, 2007) — Researchers at Chalmers University in Sweden have succeeded in combining a receiver for high frequencies with an antenna on a small chip.

The receiver is just a few square millimetre and is suitable for new safety systems, image sensors, and radio communication for high bitrates. The receiver is an electronic circuit including antenna, low noise amplifier, and frequency converter monolithically integrated on gallium arsenide.

"This is a breakthrough in our research. Our result opens the possibility to manufacture systems for very high frequencies within the so called 'THZ-electronics' area, to a relatively low cost. In the next phase of this project even more functions can be integrated on the same chip", according to Herbert Zirath, professor at the department of Microwave Electronics.

This circuit can be used, for instance, in radiometer systems in future safety systems looking for concealed weapons without personal intrusive search. Other applications for this circuit are imaging sensors that can look through darkness, smoke or fog. This is an important safety function for vehicles such as cars and aircrafts.

"Thanks to this technology, we now have the possibility of integrating imaging sensors by using circuits of a few square millimetre which is much smaller that the present technology at a lower cost. For automotive applications such as cars, aircrafts and satellites, the size and weight is of utmost importance. The present systems consist of many pieces and demands several cubic decimetres volume", says Herbert Zirath.

The new circuit is designed to work at the frequency of 220 gigahertz, but this is not an upper limit. According to professor Zirath, the technology can be used up to and above 300GHz in a near future.

The technology is also interesting for wireless data communication because, due to the very high bandwidth, data rate well above 10 Gbit/s is possible to realize in future radio links. Together with Omnisys Instruments in Gothenburg, we are also implementing receivers for future earth observation satellites for environmental studies and weather forecasts at frequencies 118 and 183 GHz, using the same technology.

This work is the results of a co-operation between Chalmers, Saab Microwave Systems, Omnisys Instruments AB, FOI, The Fraunhofer Institute IAF in Freiburg and FGAN, Germany, within the project "nanoComp".

Adapted from materials provided by Chalmers University.

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Cooler, Faster, Cheaper: Researchers Advance Process To Manufacture Silicon Chips

Daily Science Journal (Dec. 11, 2007) — The next generation of laptops, desk computers, cell phones and other semiconductor devices may get faster and more cost-effective with research from Clemson University.

Prototype of the semiconductor processing equipment may lead to commercial manufacturing tools for developing future generations of silicon chips. (Credit: Image courtesy of Clemson University)

“We’ve developed a new process and equipment that will lead to a significant reduction in heat generated by silicon chips or microprocessors while speeding up the rate at which information is sent,” says Rajendra Singh, D. Houser Banks Professor and director for the Center for Silicon Nanoelectronics at Clemson University.

The heart of many high-tech devices is the microprocessor that performs the logic functions. These devices produce heat depending on the speed at which the microprocessor operates. Higher speed microprocessors generate more heat than lower speed ones. Presently, dual-core or quad-core microprocessors are packaged as a single product in laptops so that heat is reduced without compromising overall speed of the computing system. The problem, according to Singh, is that writing software for these multicore processors, along with making them profitable, remains a challenge.

“Our new process and equipment improve the performance of the materials produced, resulting in less power lost through leakage. Based on our work, microprocessors can operate faster and cooler. In the future it will be possible to use a smaller number of microprocessors in a single chip since we’ve increased the speed of the individual microprocessors. At the same time, we’ve reduced power loss six-fold to a level never seen before. Heat loss and, therefore, lost power has been a major obstacle in the past,” said Singh.

The researchers say the patented technique has the potential to improve the performance and lower the cost of next-generation computer chips and a number of semiconductor devices, which include green energy conversion devices such as solar cells.

“The potential of this new process and equipment is the low cost of manufacturing, along with better performance, reliability and yield,” Singh said. “The semiconductor industry is currently debating whether to change from smaller (300 mm wafer) manufacturing tools to larger ones that provide more chips (450 mm). Cost is the barrier to change right now. This invention potentially will enable a reduction of many processing steps and will result in a reduction in overall costs.”

Participants in the research included Aarthi Venkateshan, Kelvin F. Poole, James Harriss, Herman Senter, Robert Teague of Clemson and J. Narayan of North Carolina State University at Raleigh. Results were published in Electronics Letters, Oct. 11, 2007, Volume: 43, Issue: 21,
 pages: 1130-1131. The work reported here is covered by a broad-base patent of Singh and Poole issued to Clemson University in 2003.

Adapted from materials provided by Clemson University.

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